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Principal Chip Power Integrity Engineer

Job DescriptionJob DescriptionPrincipal Chip Power Integrity Engineer

Location:  San Jose or Irvine in CA or Fort Collins, CO. 

Comp: 225-265k base + 30% bonus + VERY generous RSUs totaling approx $1-1.2m (which vests over 4 yrs).  Total package $500-650k for Master or Distinguished Engineer

Introduction

A global infrastructure tech provider delivering high-performance semiconductor and enterprise software solutions that power AI workloads, data centers, and cloud platforms. Trusted for scalable, secure, and mission-critical innovation across industries.

 

Top Reasons To Work With Us

  • Low stress environment with great work/life balance
  • Amazing package with base, strong bonus and industry leading RSU program! 
  • Work for an industry leader in high growth mode with huge career growth potential

 

What You Will Be Doing

  • Perform full chip power integrity analysis on large advanced node designs using state of the art parallel processing tools
  • Diagnose and resolve power delivery issues across a range of products including small high impedance die and large high power 2.5D and 3D designs
  • Develop and maintain scalable full chip power integrity methodologies and signoff flows
  • Run PDN simulations to address system level voltage budget and IR drop constraints
  • Create abstracted macro models for specialized blocks and cells
  • Conduct power delivery network simulations using tools such as HSPICE or ADS
  • Use Redhawk SC for detailed power integrity modeling and signoff
  • Support Totem flows and CMM model creation as needed
  • Collaborate with cross functional design, implementation, and methodology teams to ensure robust power delivery throughout the VLSI flow
  • Build automation and tooling using scripting languages such as Tcl and Python

You're a fit if:

  • You are highly skilled in full chip power integrity analysis and can work with modern tools capable of parallel processing extremely large node count designs in advanced FinFET technologies
  • You have a track record of resolving power integrity issues across a wide range of products, including 2.5D designs, from small die with high impedance concerns to very large chips with high power usage and heavy step load demands
  • You have experience helping customers address system level voltage budget challenges through PDN simulation work
  • You communicate clearly and confidently with architects, technical leaders, and senior level client stakeholders
  • You have a MSEE and 10+yrs experience or BSEE and 12+ yrs

And you have hands on experience with: 

  • Creating new full chip power integrity methodologies and flows that scale to very large node count designs
  • Building advanced power integrity approaches for analyzing and signing off 2.5D and 3D products
  • Troubleshooting chip power delivery problems and providing actionable guidance to block owners
  • Running power delivery network simulations using tools such as HSPICE or ADS
  • Applying deep knowledge of Redhawk SC for power integrity analysis and signoff
  • Navigating the full VLSI design flow using common EDA tools (Cadence, Synopsys, Mentor) along with scripting languages such as Tcl and Python or others. 

What's nice to have: 

Developing abstract macro models for specialized blocks or custom cells, 3D designs, Working with Totem flows and generating CMM models, 

 

Benefits

Health, dental, and vision insurance

  • Life and insurance 
  • FSA and HSA
  • 401k with match
  • ESPP
  • Generous PTO
  • Annual bonus from 15-30% (depending on your level)
  • VERY generous stocks! 

- For this position, you must be currently authorized to work in the United States without the need for sponsorship for a non-immigrant visa. CyberCoders will consider for Employment in the City of Los Angeles qualified Applicants with Criminal Histories in a manner consistent with the requirements of the Los Angeles Fair Chance Initiative for Hiring (Ban the Box) Ordinance.This job was first posted by CyberCoders on 01/26/2026 and applications will be accepted on an ongoing basis until the position is filled or closed.CyberCoders is proud to be an Equal Opportunity Employer

All qualified applicants will receive consideration for employment without regard to , , , , , , or expression, , ancestry, citizenship, genetic information, registered domestic partner status, marital status, status as a crime victim, , protected veteran status, or any other characteristic protected by law. Our hiring process includes AI screening for keywords and minimum qualifications. Recruiters review all results.  CyberCoders will consider qualified applicants with criminal histories in a manner consistent with the requirements of applicable state and local law, including but not limited to the Los Angeles County Fair Chance Ordinance, the San Francisco Fair Chance Ordinance, and the California Fair Chance Act. CyberCoders is committed to working with and providing reasonable accommodation to individuals with physical and mental disabilities. Individuals needing special assistance or an accommodation while seeking employment can contact a member of our Human Resources team at Benefits@CyberCoders.com to make arrangements.