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Senior Test Engineer (Advantest V93k / High Speed)

Job Description

Senior Test Engineer | V93k / High-Speed | San Jose

A global semiconductor powerhouse in San Jose is looking to hire a Senior Test Engineer.

Here you’ll collaborate with some of the brightest minds in the industry. In this highly visible role, you’ll play a key part in defining and designing next- products that power the world’s most advanced systems.

This is a chance to move away from legacy maintenance and onto cutting-edge NPI (New Product Introduction) for high-speed memory interface chips.

In this role, you aren’t just running tests; you are designing the hardware and strategies that ensure the world’s fastest data centres stay fast and secure.

The Role:

  • ATE Hardware Design: Design load boards and probe cards for complex, high-speed digital products.
  • NPI Ownership: Take silicon from the first "bring-up" in the lab all the way to high-volume manufacturing.
  • Yield Mastery: Use your SmarTest expertise to optimize yield and reduce test time across global sites.
  • Global Collaboration: Work closely with design teams and offshore OSATs to ensure robust DFT coverage.

What You Need:

  • V93k Experience: Strong hands-on proficiency with the Advantest V93000 platform is essential.
  • Background: 5-7+ years in Semiconductor Test Engineering (B.S./M.S. in EE ).
  • Technical Skills: Experience with DFT (Scan, ATPG, JTAG) and SmarTest/RedHat environments.
  • The "Extra": If you’ve worked with DDR or High-Speed Digital products, you’ll move to the front of the queue.

Interested? Apply directly through LinkedIn, or send your CV to george@eu-recruit.com

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