Sr. Post-Silicon Systems Software Validation Engineer, Annapurna Labs

Annapurna Labs, an AWS organization with development centers in the U.S. and Israel, builds custom silicon and software for AWS customers. Our team combines cloud-scale innovation with world-class expertise across silicon engineering, hardware design, verification, software, and operations to tackle technical challenges that have never been seen before.

Join our Silicon Validation team to validate next- machine learning accelerators that power AWS's cloud computing infrastructure. You'll work in a fast-paced, startup-like environment alongside some of the brightest minds in the industry on cutting-edge, internet-scale technology that directly impacts how customers use Machine Learning acceleration. We are changing the landscape of cloud infrastructure by accelerating the development of custom silicon by moving beyond traditional partnerships to dominate in AI training and inference.

Your work will span validation of the complete vertical stack—silicon, PCB, high-speed components (HBM, PCIe, chip-to-chip), inter-system connections, and system-to-system interfaces. You'll dive deep into new technology hardware components and scaling technologies that power our Machine Learning boards and servers at scale, ensuring every component of our hardware and software comes together into products our customers rely on.

Key job responsibilities
As a Senior Validation Engineer on our Machine Learning Acceleration team, you'll lead and own critical validation aspects across the entire product development lifecycle—from early design validation through emulation, silicon bring-up, post-silicon validation, and ongoing support of production systems deployed in AWS data centers. You'll collaborate deeply with architecture, RTL design, design verification, firmware, and software teams to ensure our next- AI/ML accelerators meet the highest standards of quality and performance. This role requires bridging multiple domains and broad scope of impact—from low-level hardware interfaces to high-level ML workloads—to deliver exceptional results.

We are looking for candidates with:
- Strong programming skills (Python, Lua, C/C++, Rust, Go, etc)
- A solid understanding of computer architecture and chip/system validation methodologies
- Experience with cloud infrastructure and CI/CD
- Firmware testing and/or development (BIOS, BMC, drivers)
- Domain expertise in any of these areas: PCIe, HBM, GPUs, neural networks, ML HW architecture
- Knowledge of the full validation lifecycle from RTL simulation (SystemVerilog/UVM, VCS, Questa, Xcelium) and emulation (Palladium, Zebu, Veloce) through silicon failure analysis and debug

A day in the life
- Developing comprehensive validation strategies and leads new methodologies to improve validation coverage and time to root cause.
- Role models detailed test plans covering functional, performance, power, and stress testing from silicon bring-up to product release
- Mentors and provides direction to junior validation engineers
- Executes complex test plans from RTL simulation and emulation environments through physical silicon validation
- Handing complex debug including hands-on silicon bring-up and debug in the lab using oscilloscopes, logic analyzers, and protocol analyzers
- Validating ML accelerator performance, accuracy, and reliability using real-world neural network workloads
- Building test infrastructure, CI/CD, and automated regression frameworks to enable efficient validation at scale
- Collaborating across architecture, design, firmware, and software teams to triage failures and drive root cause analysis to closure
- Reviewing test results, identifying patterns, and providing feedback to improve design quality and validation coverage
- Delivering new tests to production systems in AWS data centers and manufacturing to improve fleet health